dc.contributor.author | Kritavorn, Pairat | en_US |
dc.contributor.author | ไพรัตน์ กรีถาวร | en_US |
dc.date.accessioned | 2021-01-31T05:28:58Z | |
dc.date.available | 2021-01-31T05:28:58Z | |
dc.date.issued | 2021-01-31 | |
dc.identifier.uri | http://repository.rmutp.ac.th/handle/123456789/3564 | |
dc.description | วิทยานิพนธ์ (วศ.ม.) -- มหาวิทยาลัยเทคโนโลยีราชมงคลพระนคร, 2559 | en_US |
dc.description.abstract | This thesis presents the combined loss reduction approach to apply in distribution system. The thesis objective reduces the loss in the distribution system, when all voltage magnitude levels at connection points must under the limits. Therefore, the Simulated Annealing Technical selects as searching tool to find the suitable location of DG and Capacitor. The propose technique applies to the distribution system 69 buses model. The results shown that this technique can reduce in power losses from properly organize the location of DG and Capacitor. Moreover, it can also balance and increase the voltage levels. The propose Simulated Annealing Technical is used to determine and organize the sectionalizing and tie switches in the feeder, which installs DG and Capacitor, by considering the power losses, and the number of time to change the status of disconnecting switches. | en_US |
dc.description.sponsorship | Rajamangala University of Technology Phra Nakhon | en_US |
dc.language.iso | th | en_US |
dc.subject | Electric power systems -- Load dispatching | en_US |
dc.subject | ระบบไฟฟ้ากำลัง -- การจ่ายโหลด | en_US |
dc.subject | Distributed generator | en_US |
dc.subject | แหล่งผลิตไฟฟ้าแบบกระจาย | en_US |
dc.subject | Simulated Annealing | en_US |
dc.subject | การอบอ่อนจำลอง | en_US |
dc.subject | Feeder Reconfiguration | en_US |
dc.subject | การจัดเรียงสายป้อนใหม่ | en_US |
dc.title | The combined loss reduction approach to apply in distribution system | en_US |
dc.title.alternative | การผสานแนวทางการลดกำลังสูญเสียเพื่อประยุกต์ใช้ในระบบจำหน่ายไฟฟ้า | en_US |
dc.type | Thesis | en_US |
dc.contributor.emailauthor | arit@rmutp.ac.th | en_US |